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general description the max5432?ax5435 nonvolatile, linear-taper, digi- tal potentiometers perform the function of a mechanical potentiometer, but replace the mechanics with a simple 2-wire serial interface. each device performs the same function as a discrete potentiometer or a variable resis- tor and has 32 tap points. the max5432?ax5435 feature an internal, nonvolatile, electrically erasable programmable read-only memory (eeprom) that returns the wiper to its previously stored position at power-up. the fast-mode i 2 c ? -compatible serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing inter- connection complexity. each device is available with one of four factory-preset i 2 c addresses (see the selector guide ). use the max5432?ax5435 in applications requiring digitally controlled resistors. two resistance values are available (50k ? and 100k ? ) in a voltage-divider or vari- able resistor configuration. the nominal resistor temper- ature coefficient is 35ppm/? end-to-end, and only 5ppm/? ratiometric, making the devices ideal for applications requiring a low-temperature-coefficient variable resistor such as low-drift, programmable-gain amplifier circuit configurations. the max5432/max5433 are available in a 3mm x 3mm 8- pin tdfn package and the max5434/max5435 are avail- able in a 6-pin thin sot23 package. the max5432 max5435 are specified over the extended (-40? to +85?) temperature range. applications mechanical potentiometer replacement low-drift programmable-gain amplifiers volume control liquid-crystal display (lcd) screen adjustment features ? tiny 3mm x 3mm 8-pin tdfn and 6-pin thin sot23 packages ? power-on recall of wiper position from nonvolatile memory ? 35ppm/? end-to-end resistance temperature coefficient ? 5ppm/? ratiometric temperature coefficient ? 50k ? /100k ? resistor values ? fast 400kbps i 2 c-compatible serial interface ? 500na (typ) static supply current ? +2.7v to +5.25v single-supply operation ? 32 tap positions ? ?.15 lsb inl (typ), ?.15 lsb dnl (typ) max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers ________________________________________________________________ maxim integrated products 1 ordering information 1 9 - 3 5 1 1 ; r e v 1 ; 1 2 / 0 4 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package max5432 leta -40 c to +85 c 8 tdfn-ep** max5432meta* -40 c to +85 c 8 tdfn-ep** max5433 leta -40 c to +85 c 8 tdfn-ep** max5433meta* -40 c to +85 c 8 tdfn-ep** max5434 lezt-t -40 c to +85 c 6 thin sot23-6 max5434mezt-t* -40 c to +85 c 6 thin sot23-6 max5434nezt-t* -40 c to +85 c 6 thin sot23-6 max5434pezt-t* -40 c to +85 c 6 thin sot23-6 max5435 lezt-t -40 c to +85 c 6 thin sot23-6 max5435mezt-t* -40 c to +85 c 6 thin sot23-6 max5435nezt-t* -40 c to +85 c 6 thin sot23-6 max5435pezt-t* -40 c to +85 c 6 thin sot23-6 ? purchase of i 2 c components from maxim integrated products, inc., or one of its sublicensed associated companies, conveys a license under the philips i 2 c patent rights to use these com- ponents in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. selector guide appears at end of data sheet. * future product?ontact factory for availability. ** ep = exposed pad. tdfn top view gnd sdascl 16l 5w v dd sot23 2 34 max5434 max5435 a0 v dd scl 1 2 8 7 w lsda gnd h 3 4 6 5 max5432 max5433 pin configurations
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ...........................................................-0.3v to +6.0v sda, scl to gnd..................................................-0.3v to +6.0v a0, h, l, and w to gnd .............................-0.3v to (v dd + 0.3v) maximum continuous current into h, l, and w max5432/max5434.....................................................?.3ma max5433/max5435.....................................................?.6ma input/output latchup immunity........................................?0ma continuous power dissipation (t a = +70?) 6-pin thin sot23 (derate 9.1mw/? above +70?) ....727mw 8-pin tdfn (derate 18.2mw/? above +70?) ......1454.5mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-60? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40? to +85?, unless otherwise noted. typical values are at v dd = +5v, t a = +25?.) (note 1) parameter symbol conditions min typ max units dc performance resolution 32 taps max5432/max5434 37.5 50 62.5 end-to-end resistance r h-l max5433/max5435 75 100 125 k ? end-to-end resistance temperature coefficient tc r 35 ppm/? ratiometric resistance temperature coefficient 5 ppm/? v dd = 5v ?.15 ?.5 variable resistor (note 2) v dd = 3v ?.15 ?.5 v dd = 5v ?.15 ?.5 integral nonlinearity inl voltage-divider, max5432/max5433 (note 3) v dd = 3v ?.15 ?.5 lsb v dd = 5v ?.15 ?.5 variable resistor (note 2) v dd = 3v ?.15 ?.5 v dd = 5v ?.15 ?.5 differential nonlinearity dnl voltage-divider, max5432/max5433 (note 3) v dd = 3v ?.15 ?.5 lsb max5432, 50k ? -0.5 full-scale error (note 4) max5433, 100k ? -0.5 lsb max5432, 50k ? +0.5 zero-scale error (note 5) max5433, 100k ? +0.5 lsb wiper resistance r w max5432/max5433 (note 6) 610 1200 ? digital inputs input high voltage v ih (note 7) 0.7 x v dd v input low voltage v il (note 7) 0.3 x v dd v input leakage current i leak ? ? input capacitance 5pf
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40? to +85?, unless otherwise noted. typical values are at v dd = +5v, t a = +25?.) (note 1) parameter symbol conditions min typ max units dynamic characteristics max5432/max5434 500 -3db bandwidth (note 8) max5433/max5435 250 khz max5432/max5434 0.5 wiper settling time (note 9) max5433/max5435 1.0 ? nonvolatile memory reliability data retention t a = +85? 50 years t a = +25? 200,000 endurance t a = +85? 50,000 stores power supply power-supply voltage v dd 2.70 5.25 v standby current i dd digital inputs = v dd or gnd, t a = +25? 0.5 2 a programming current during nonvolatile write; digital inputs = v dd or gnd (note 10) 200 900 ? note 1: all devices are production tested at t a = +25? and are guaranteed by design and characterization for -40? < t a < +85?. timing characteristics (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40? to +85?, unless otherwise noted. typical values are at v dd = +5v, t a = +25?.) (figures 1 and 2) (note 11) parameter symbol conditions min typ max units scl clock frequency f scl 400 khz setup time for start condition t su-sta 0.6 ? hold time for start condition t hd-sta 0.6 ? clk high time t high 0.6 ? clk low time t low 1.3 ? data setup time t su-dat 100 ns data hold time t hd-dat 0 0.9 ? sda, scl rise time t r 300 ns sda, scl fall time t f 300 ns setup time for stop condition t su-sto 0.6 ? bus free time between stop and start condition t buf 1.3 ? pulse width of spike suppressed t sp 50 ns capacitive load for each bus line c b (note 12) 400 pf nonvolatile store time idle time required after a nonvolatile memory write (note 13) 12 ms
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 4 _______________________________________________________________________________________ timing characteristics (continued) (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40? to +85?, unless otherwise noted. typical values are at v dd = +5v, t a = +25?.) (figures 1 and 2) (note 1) typical operating characteristics (v dd = +5v, t a = +25?, unless otherwise noted.) 0 0.3 0.9 0.6 1.2 1.5 -40 10 -15 35 60 85 standby supply current vs. temperature max5432?5 toc01 temperature ( c) supply current ( a) digital inputs = gnd or v dd v dd = 5v v dd = 3v 0 0.2 0.6 0.4 0.8 1.0 2.5 3.5 3.0 4.0 4.5 5.0 5.5 supply current vs. supply voltage max5432?5 toc02 supply voltage (v) supply current ( a) digital inputs = gnd or v dd 02 135 supply current vs. digital input voltage max5432?5 toc03 digital input voltage (v) supply current ( a) 1000 0.1 1 10 100 v dd = 5v v dd = 3v 4 vv v wh h - 31 ? ? ? ? ? ? . vv v wl h - 31 ? ? ? ? ? ? . note 2: the dnl and inl are measured with the potentiometer configured as a variable resistor. for the 3-terminal potentiometers (max5432/max5433), h is unconnected and l = gnd. at v dd = 5v, w is driven with a source current of 80? for the 50k ? configuration, and 40? for the 100k ? configuration. at v dd = 3v, w is driven with a source current of 40? for the 50k ? configuration, and 20? for the 100k ? configuration. note 3: the dnl and inl are measured with the potentiometer configured as a voltage-divider with h = v dd and l = gnd (max5432/max5433 only). the wiper terminal is unloaded and measured with an ideal voltmeter. note 4: full-scale error is defined as note 5: zero-scale error is defined as note 6: the wiper resistance is the worst value measured by injecting the currents given in note 2 into w with l = gnd. r w = (v w - v h ) / i w . note 7: the device draws current in excess of the specified supply current when the digital inputs are driven with voltages between (v dd - 0.5v) and (gnd + 0.5v). see the supply current vs. digital input voltage graph in the typical operating characteristics . note 8: wiper is at midscale with a 10pf capacitive load. potentiometer set to midscale, l = gnd, an ac source is applied to h, and the output is measured as 3db lower than the dc w/h value in db. note 9: this is measured from the stop pulse to the time it takes the output to reach 50% of the output step size (divider mode). it is measured with a maximum external capacitive load of 10pf. note 10: the programming current exists only during nv writes (12ms typ). note 11: digital timing is guaranteed by design and characterization, and is not production tested. note 12: an appropriate bus pullup resistance must be selected depending on board capacitance. refer to the i 2 c-bus specifica- tion document linked to this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf note 13: the idle time begins from the initiation of the stop pulse.
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers _______________________________________________________________________________________ 5 1.0 0.5 0 -0.5 -1.0 -40 10 -15 35 60 85 end-to-end resistance % change vs. temperature max5432?5 toc04 temperature ( c) end-to-end resistance change ( %) 50k ? 1.0 0.5 0 -0.5 -1.0 -40 10 -15 35 60 85 end-to-end resistance % change vs. temperature max5432-35 toc05 temperature ( c) end-to-end resistance % change 100k ? 1 s/div tap-to-tap switching transient (0 to midscale, c l = 10pf) v w 1v/div sda 2v/div max5432?5 toc06 50k ? 1 s/div tap-to-tap switching transient (0 to midscale, c l = 10pf) v w 1v/div sda 2v/div max5432?5 toc07 100k ? 10 s/div wiper transient at power-on v w 1v/div v dd 2v/div max5432?5 toc08 50k ? 10 s/div midscale wiper transient at power-on v w 1v/div v dd 2v/div max5432?5 toc09 100k ? midscale wiper response vs. frequency (max5432) max5432 toc10 frequency (khz) gain (db) 100 10 1 -15 -12 -9 -6 -3 0 -18 0.1 1000 c w = 10pf c w = 33pf -18 -12 -15 -6 -3 -9 0 0.1 1 10 100 1000 midscale wiper response vs. frequency (max5433) max5432?5 toc11 frequency (khz) gain (db) c w = 10pf c w = 33pf 0 100 300 200 500 600 400 700 0812 4 1620242831 wiper resistance vs. tap position (max5432) max5432?5 toc12 tap position resistance ( ? ) v dd = 3v typical operating characteristics (continued) (v dd = +5v, t a = +25?, unless otherwise noted.)
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 6 _______________________________________________________________________________________ typical operating characteristics (continued) (v dd = +5v, t a = +25?, unless otherwise noted.) 0 100 300 200 500 600 400 700 0812 416202428 wiper resistance vs. tap position (max5433) max5432-35 toc13 tap position resistance ( ? ) v dd = 3v 31 0 100 300 200 500 600 400 700 0812 4 1620242831 wiper resistance vs. tap position (max5432) max5432?5 toc14 tap position resistance ( ? ) v dd = 5v 0 100 300 200 500 600 400 700 0812 416202428 wiper resistance vs. tap position (max5433) max5432-35 toc15 tap position resistance ( ? ) v dd = 5v 31 0 20 10 40 90 30 120 0812 416202428 w-to-l resistance vs. tap position max5432?5 toc16 tap position w-to-l resistance (k ? ) 110 100 80 60 50 70 50k ? 100k ? 31 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 41620242831 resistance dnl vs. tap position max5432?5 toc17 tap position resistance dnl (lsb) variable-resistor mode max5432/max5434 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 41620242831 resistance inl vs. tap position max5432?5 toc18 tap position resistance inl (lsb) variable-resistor mode max5432/max5434
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers _______________________________________________________________________________________ 7 typical operating characteristics (continued) (v dd = +5v, t a = +25?, unless otherwise noted.) -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 41620242831 resistance dnl vs. tap position max5432?5 toc19 tap position resistance dnl (lsb) voltage-divider mode max5432 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 41620242831 resistance inl vs. tap position max5432?5 toc20 tap position resistance inl (lsb) voltage-divider mode max5432 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 416202428 resistance dnl vs. tap position max5432-35 toc21 tap position resistance dnl (lsb) variable-resistor mode max5433/max5435 31 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 416202428 resistance inl vs. tap position max5432-35 toc22 tap position resistance inl (lsb) variable-resistor mode max5433/max5435 31 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 416202428 resistance dnl vs. tap position max5432-35 toc23 tap position resistance dnl (lsb) voltage-divider mode max5433 31 -0.5 -0.3 -0.4 -0.1 -0.2 0.1 0 0.2 0.4 0.3 0.5 0812 416202428 resistance inl vs. tap position max5432-35 toc24 tap position resistance inl (lsb) voltage-divider mode max5433 31
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 8 _______________________________________________________________________ detailed description the max5432?ax5435 contain a resistor array with 31 resistive elements. the max5432/max5434 provide a total end-to-end resistance of 50k ? , and the max5433/max5435 provide an end-to-end resistance of 100k ? . the max5432/max5433 allow access to the high, low, and wiper terminals for a standard voltage-divider con- figuration. connect h, l, and w in any desired configu- ration as long as their voltages fall between gnd and v dd . the max5434/max5435 are variable resistors with h internally connected to the wiper. a simple 2-wire i 2 c-compatible serial interface moves the wiper among the 32 tap points. eight data bits, an address byte, and a control byte program the wiper position. a nonvolatile memory stores and recalls the wiper position in the nonvolatile memory upon power-up. the nonvolatile memory is guaranteed for 200,000 wiper store cycles and 50 years for wiper data retention. digital interface the max5432?ax5435 feature an internal, nonvolatile eeprom that returns the wiper to its previously stored position at power-up. the shift register decodes the control and address bits, routing the data to the proper memory registers. write data to the volatile memory register to immediately update the wiper position, or write data to the nonvolatile register for storage. writing to the nonvolatile register takes a minimum of 12ms. the volatile register retains data as long as the device is enabled and powered. removing power clears the volatile register. the nonvolatile register retains data even after power is removed. upon power-up, the power-on reset circuitry and internal oscillator control the transfer of data from the nonvolatile register to the volatile register. serial addressing the max5432?ax5435 operate as a slave that sends and receives data through an i 2 c- and smbus-com- patible 2-wire interface. the interface uses a serial data access (sda) line and a serial clock line (scl) to achieve bidirectional communication between master(s) and slave(s). a master, typically a microcon- troller, initiates all data transfers to and from the max5432?ax5435, and generates the scl clock that synchronizes the data transfer (figure 1). sda operates as both an input and an open-drain out- put. sda requires a pullup resistor, typically 4.7k ? . scl only operates as an input. scl requires a pullup resistor (4.7k ? typ) if there are multiple masters on the 2-wire interface, or if the master in a single-master sys- tem has an open-drain scl output. each transmission consists of a start (s) condition (figure 3) sent by a master, followed by the max5432?ax5435 7-bit slave address plus the 8th bit (figure 4), 1 command byte (figure 7) and 1 data byte, and finally a stop (p) condition (figure 3). start and stop conditions both scl and sda remain high when the interface is not busy. a master signals the beginning of a transmis- sion with a start (s) condition by transitioning sda from high to low while scl is high. when the master has finished communicating with the slave, it issues a stop (p) condition by transitioning the sda from low to max5432?ax5435 max5432?ax5435 pin description pin tdfn thin sot23 name function 1 h high terminal 2 4 sda i 2 c-compatible interface data input 3 2 gnd ground 4 3 scl i 2 c-compatible interface clock input 51v dd power-supply input. bypass with a 0.1? capacitor from v dd to gnd. 6 a0 address input. sets the i 2 c address. connect to v dd or gnd. do not leave a0 floating. 7 6 l low terminal 8 5 w wiper terminal ep ep exposed pad. internally connected to gnd. smbus is a trademark of intel corporation.
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers __________________________________________________________________________ high while scl is high. the bus is then free for another transmission (figure 3). bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable while scl is high (figure 5). acknowledge the acknowledge bit is a clocked 9th bit that the recip- ient uses to handshake receipt of each byte of data (figure 6). each byte transferred effectively requires 9 bits. the master generates the 9th clock pulse, and the recipient pulls down sda during the acknowledge clock pulse, so the sda line is stable low during the high period of the clock pulse. when the master trans- mits to the max5432?ax5435, the devices generate the acknowledge bit because the max5432?ax5435 are the recipients. slave address the max5432?ax5435 have a 7-bit-long slave address (figure 4). the 8th bit following the 7-bit slave address is the nop/ w bit. set the nop/ w bit low for a write command and high for a no-operation command. table 1a shows four possible slave addresses for the max5432/max5433 and table 1b shows four possible slave addresses for the max5434/max5435. the first 4 bits (msbs) of the slave addresses are always 0101. bits a2 and a1 are factory programmed for the max5432/max5433 (table 1a). connect the a0 input (max5432/max5433 only) to either gnd or v dd to select one of two i 2 c device addresses. each device must have a unique address to share the bus. a maxi- mum of four max5432/max5433 devices can share the same bus. bits a2, a1, and a0 are factory programmed for the max5434/max5435 (table 1b). message format for writing a write to the max5432?ax5435 consists of the trans- mission of the device? slave address with the 8th bit set to zero, followed by at least 1 byte of information. the 1st byte of information is the command byte. the bytes received after the command byte are the data bytes. the 1st data byte goes into the internal register of the max5432?ax5435 as selected by the command byte (figure 8). t hd-sta t su-dat t high t r t f t hd-dat t hd-sta s sr a t su-sta t low t buf t su-sto ps t r t f scl sda parameters are measured from 30% to 70%. figure 1. i 2 c serial-interface timing diagram address byte part suffix a6 a5 a4 a3 a2 a1 a0 nop/ w l 0 1 0 1 0 0 0 nop/ w m 0 1 0 1 1 0 0 nop/ w n 0 1 0 1 0 1 0 nop/ w p 0 1 0 1 1 1 0 nop/ w address byte part suffix a6 a5 a4 a3 a2 a1 a0 nop/ w l 0101000 nop/ w l 0101001 nop/ w m 0101100 nop/ w m 0101101 nop/ w table 1a. address codes (max5432/max5433 only) table 1b. address codes (max5434/max5435 only)
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 10 ______________________________________________________________________ command byte use the command byte to select the destination of the wiper data (nonvolatile or volatile memory registers) and swap data between nonvolatile and volatile memo- ry registers (see table 2). data byte the max5432?ax5435 use the first 5 bits (msbs, d7?3) of the data byte to set the position of the wiper. the last 3 bits (d2, d1, and d0) are don? care bits (see table 2). command descriptions vreg: the data byte writes to the volatile memory reg- ister and the wiper position updates with the data in the volatile memory register. nvreg: the data byte writes to the nonvolatile memory register. the wiper position is unchanged. nvregxvreg: data transfers from the nonvolatile memory register to the volatile memory register (wiper position updates). vregxnvreg: data transfers from the volatile memory register into the nonvolatile memory register. max5432?ax5435 v dd i ol = 3ma i oh = 0ma v out 400pf sda figure 2. load circuit register address byte command btye data byte 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 scl cycle number start a6 a5 a4 a3 a2 a1 a0 n o p/ w a c k c7 c6 c5 c4 c3 c2 c1 c0 a c k d7 d6 d5 d4 d3 d2 d1 d0 a c k stop vreg 0 1 0 1 a2 a1 a0 0 0 0 0 1 0 0 0 1 d7 d6 d5 d4 d3 x x x nvreg 0 1 0 1 a2 a1 a0 0 0 0 1 0 0 0 0 1 d7 d6 d5 d4 d3 x x x nvregxvreg 0 1 0 1 a2 a1 a0 0 0 1 1 0 0 0 0 1 d7 d6 d5 d4 d3 x x x vregxnvreg 0 1 0 1 a2 a1 a0 0 0 1 0 1 0 0 0 1 d7 d6 d5 d4 d3 x x x table 2. command byte summary sda start condition scl s stop condition p figure 3. start and stop conditions sda scl *see the selector guide for other address options. 01 a0 msb lsb nop/w ack 0 1 0* 0* figure 4. slave address x = don? care.
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers ______________________________________________________________________________________ 11 nonvolatile memory the internal eeprom consists of a 5-bit nonvolatile register that retains the value written to it before the device is powered down. the nonvolatile register is programmed with the zeros at the factory. wait a mini- mum of 12ms after writing to nvreg before sending another command. power-up upon power-up, the max5432?ax5435 load the data stored in the nonvolatile memory register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile memory register. this initialization period takes 20?. standby the max5432?ax5435 feature a low-power standby mode. when the device is not being programmed, it goes into standby mode and current consumption is typically 0.5?. sda data stable, data valid change of data allowed scl figure 5. bit transfer 1 scl start condition sda 289 clock pulse for acknowledgment acknowledge not acknowledge figure 6. acknowledge s slave address 0 a d15 d14 d13 d12 d11 d10 d9 d8 command byte a p acknowledge from max5432?ax5435 acknowledge from max5432?ax5435 nop/w command byte is stored on receipt of stop condition figure 7. command byte received s slave address 0 a d15 d14 d13 d12 d11 d10 d9 d8 command byte acknowledge from max5432?ax5435 acknowledge from max5432?ax5435 nop/w how command byte and data byte map into max5432?ax5435's registers a data byte a p d7 d6 d5 d4 d3 x xx byte 1 acknowledge from max5432?ax5435 figure 8. command and single data byte received
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 12 ______________________________________________________________________________________ applications information use the max5432?ax5435 in applications requiring digitally controlled adjustable resistance, such as lcd contrast control (where voltage biasing adjusts the dis- play contrast), or for programmable filters with adjustable gain and/or cutoff frequency. positive lcd bias control figures 9 and 10 show an application where the volt- age-divider or variable resistor is used to make an adjustable, positive lcd bias voltage. the op-amp pro- vides buffering and gain to the resistor-divider network made by the potentiometer (figure 9) or to a fixed resistor and a variable resistor (figure 10). programmable filter figure 11 shows the configuration for a 1st-order pro- grammable filter. the gain of the filter is adjusted by r2, and the cutoff frequency is adjusted by r3. use the following equations to calculate the gain (g) and the 3db cutoff frequency (f c ). adjustable voltage reference figure 12 shows the max5432/max5433 used as the feedback resistors in an adjustable voltage reference application. independently adjust the output voltages of the max6160 from 1.23v to (v in - 0.2v) by changing the wiper position of the max5432/max5433. g r r f rc c =+ = 1 1 2 1 23 max5432?ax5435 v out 30v 5v w h l max5432 max5433 figure 9. positive lcd bias control using a voltage-divider v out 30v 5v w h l max5432 max5435 figure 10. positive lcd bias control using a variable resistor v out r1 w h l max5432 max5435 r2 v in r3 h w l c figure 11. programmable filter w h l max6160 max5432 max5433 +5v gnd v in out adj v 0 ref v 0 = 1.23v 100k ? for the max5433 r 2 (k ? ) v 0 = 1.23v 50k ? for the max5432 r 2 (k ? ) r 1 r 2 figure 12. adjustable voltage reference
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers ______________________________________________________________________________________ 13 max5432/max5433 functional diagram 5-bit shift register 5-bit latch 32- position decoder 5-bit nv memory por i 2 c interface 5 5 32 w l sda scl gnd v dd a0 h max5432 max5433 max5434/max5435 functional diagram 5-bit shift register 5-bit latch 32- position decoder 5-bit nv memory por i 2 c interface 5 5 32 w l sda scl gnd v dd max5434 max5435
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 14 ______________________________________________________________________________________ max5432?ax5435 selector guide chip information transistor count: 7817 process: bicmos part top mark i 2 c address r (k ? ) MAX5432LETA ang 010100a 0 50 max5432meta ani 010110a 0 50 max5433leta anf 010100a 0 100 max5433meta anh 010110a 0 100 max5434lezt aabx 0101000 50 max5434mezt aaby 0101100 50 max5434nezt aabs 0101010 50 max5434pezt aabu 0101110 50 max5435lezt aabw 0101000 100 max5435mezt aabv 0101100 100 max5435nezt aabz 0101010 100 max5435pezt aabt 0101110 100
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers ______________________________________________________________________________________ 15 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 6, 8, &10l, dfn thin.eps l c l c pin 1 index area d e l e l a e e2 detail a n g 1 2 21-0137 package outline, 6,8,10 & 14l, tdfn, exposed pad, 3x3x0.80 mm -drawing not to scale- common dimensions symbol min. max. a 0.70 0.80 d 2.90 3.10 e 2.90 3.10 a1 0.00 0.05 l 0.20 0.40 pkg. code n d2 e2 e jedec spec b [(n/2)-1] x e package variations 0.25 min. k a2 0.20 ref. 2.300.10 1.500.10 6 t633-1 0.95 bsc mo229 / weea 1.90 ref 0.400.05 1.95 ref 0.300.05 0.65 bsc 2.300.10 8 t833-1 2.00 ref 0.250.05 0.50 bsc 2.300.10 10 t1033-1 2.40 ref 0.200.05 - - - - 0.40 bsc 1.700.10 2.300.10 14 t1433-1 1.500.10 1.500.10 mo229 / weec mo229 / weed-3 0.40 bsc - - - - 0.200.05 2.40 ref t1433-2 14 2.300.10 1.700.10 t633-2 6 1.500.10 2.300.10 0.95 bsc mo229 / weea 0.400.05 1.90 ref t833-2 8 1.500.10 2.300.10 0.65 bsc mo229 / weec 0.300.05 1.95 ref t833-3 8 1.500.10 2.300.10 0.65 bsc mo229 / weec 0.300.05 1.95 ref -drawing not to scale- g 2 2 21-0137 package outline, 6,8,10 & 14l, tdfn, exposed pad, 3x3x0.80 mm downbonds allowed no no no no yes no yes no
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers 16 ______________________________________________________________________________________ max5432?ax5435 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
max5432?ax5435 32-tap, nonvolatile, i 2 c, linear, digital potentiometers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 17 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)

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